DIO_MEM_PWR_STATUS__HDMI4_MEM_PWR_STATE_MASK 27412 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DIO_MEM_PWR_STATUS__HDMI4_MEM_PWR_STATE_MASK                                                          0x000C0000L
DIO_MEM_PWR_STATUS__HDMI4_MEM_PWR_STATE_MASK 36548 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DIO_MEM_PWR_STATUS__HDMI4_MEM_PWR_STATE_MASK                                                          0x000C0000L