DIO_MEM_PWR_STATUS1__AFMT5_MEM_PWR_STATE__SHIFT 27584 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DIO_MEM_PWR_STATUS1__AFMT5_MEM_PWR_STATE__SHIFT                                                       0xa
DIO_MEM_PWR_STATUS1__AFMT5_MEM_PWR_STATE__SHIFT 36725 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DIO_MEM_PWR_STATUS1__AFMT5_MEM_PWR_STATE__SHIFT                                                       0xa
DIO_MEM_PWR_STATUS1__AFMT5_MEM_PWR_STATE__SHIFT 33164 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DIO_MEM_PWR_STATUS1__AFMT5_MEM_PWR_STATE__SHIFT                                                       0xa