DIDT_TD_EDC_CTRL__EDC_SW_RST__SHIFT 43606 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define DIDT_TD_EDC_CTRL__EDC_SW_RST__SHIFT                                                                   0x1
DIDT_TD_EDC_CTRL__EDC_SW_RST__SHIFT 29318 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define DIDT_TD_EDC_CTRL__EDC_SW_RST__SHIFT                                                                   0x1
DIDT_TD_EDC_CTRL__EDC_SW_RST__SHIFT 30552 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define DIDT_TD_EDC_CTRL__EDC_SW_RST__SHIFT                                                                   0x1
DIDT_TD_EDC_CTRL__EDC_SW_RST__SHIFT 30838 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define DIDT_TD_EDC_CTRL__EDC_SW_RST__SHIFT                                                                   0x1