DIDT_TCP_EDC_CTRL__EDC_SW_RST__SHIFT 43880 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define DIDT_TCP_EDC_CTRL__EDC_SW_RST__SHIFT                                                                  0x1
DIDT_TCP_EDC_CTRL__EDC_SW_RST__SHIFT 29573 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define DIDT_TCP_EDC_CTRL__EDC_SW_RST__SHIFT                                                                  0x1
DIDT_TCP_EDC_CTRL__EDC_SW_RST__SHIFT 30802 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define DIDT_TCP_EDC_CTRL__EDC_SW_RST__SHIFT                                                                  0x1
DIDT_TCP_EDC_CTRL__EDC_SW_RST__SHIFT 31055 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define DIDT_TCP_EDC_CTRL__EDC_SW_RST__SHIFT                                                                  0x1