DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT 3770 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT 0x10
DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT 3858 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT 0x10
DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT 4240 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT 0x10
DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT 10225 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT                                                           0x10
DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT 3460 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT 0x00000010
DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT 3866 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT 0x10
DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT 40835 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT                                                           0x10
DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT 49207 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT                                                           0x10
DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT 43667 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DC_GPIO_DDCVGA_MASK__AUX_PADVGA_MODE__SHIFT                                                           0x10