DCPG_INTERRUPT_CONTROL__DCFEV0_POWER_UP_INT_MASK__SHIFT  164 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DCPG_INTERRUPT_CONTROL__DCFEV0_POWER_UP_INT_MASK__SHIFT 0x18
DCPG_INTERRUPT_CONTROL__DCFEV0_POWER_UP_INT_MASK__SHIFT  196 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCPG_INTERRUPT_CONTROL__DCFEV0_POWER_UP_INT_MASK__SHIFT 0x18
DCPG_INTERRUPT_CONTROL__DCFEV0_POWER_UP_INT_MASK__SHIFT 3444 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DCPG_INTERRUPT_CONTROL__DCFEV0_POWER_UP_INT_MASK__SHIFT                                               0x18