DCO_MEM_PWR_STATUS__HDMI0_MEM_PWR_STATE__SHIFT 15461 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DCO_MEM_PWR_STATUS__HDMI0_MEM_PWR_STATE__SHIFT 0xa
DCO_MEM_PWR_STATUS__HDMI0_MEM_PWR_STATE__SHIFT 15615 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DCO_MEM_PWR_STATUS__HDMI0_MEM_PWR_STATE__SHIFT 0xa
DCO_MEM_PWR_STATUS__HDMI0_MEM_PWR_STATE__SHIFT 16297 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCO_MEM_PWR_STATUS__HDMI0_MEM_PWR_STATE__SHIFT 0xa
DCO_MEM_PWR_STATUS__HDMI0_MEM_PWR_STATE__SHIFT 8542 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DCO_MEM_PWR_STATUS__HDMI0_MEM_PWR_STATE__SHIFT                                                        0xa