DCO_MEM_PWR_STATUS__DPG_MEM_PWR_STATE__SHIFT 15459 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DCO_MEM_PWR_STATUS__DPG_MEM_PWR_STATE__SHIFT 0x9
DCO_MEM_PWR_STATUS__DPG_MEM_PWR_STATE__SHIFT 15613 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DCO_MEM_PWR_STATUS__DPG_MEM_PWR_STATE__SHIFT 0x9
DCO_MEM_PWR_STATUS__DPG_MEM_PWR_STATE__SHIFT 16295 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCO_MEM_PWR_STATUS__DPG_MEM_PWR_STATE__SHIFT 0x9
DCO_MEM_PWR_STATUS__DPG_MEM_PWR_STATE__SHIFT 8541 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DCO_MEM_PWR_STATUS__DPG_MEM_PWR_STATE__SHIFT                                                          0x9