DCO_MEM_PWR_STATUS__DPC_MEM_PWR_STATE__SHIFT 15451 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DCO_MEM_PWR_STATUS__DPC_MEM_PWR_STATE__SHIFT 0x5
DCO_MEM_PWR_STATUS__DPC_MEM_PWR_STATE__SHIFT 15605 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DCO_MEM_PWR_STATUS__DPC_MEM_PWR_STATE__SHIFT 0x5
DCO_MEM_PWR_STATUS__DPC_MEM_PWR_STATE__SHIFT 16287 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCO_MEM_PWR_STATUS__DPC_MEM_PWR_STATE__SHIFT 0x5
DCO_MEM_PWR_STATUS__DPC_MEM_PWR_STATE__SHIFT 8537 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DCO_MEM_PWR_STATUS__DPC_MEM_PWR_STATE__SHIFT                                                          0x5