DCO_MEM_PWR_STATUS1__HDMILP0_MEM_PWR_STATE__SHIFT 15633 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DCO_MEM_PWR_STATUS1__HDMILP0_MEM_PWR_STATE__SHIFT 0xa
DCO_MEM_PWR_STATUS1__HDMILP0_MEM_PWR_STATE__SHIFT 16315 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCO_MEM_PWR_STATUS1__HDMILP0_MEM_PWR_STATE__SHIFT 0xa
DCO_MEM_PWR_STATUS1__HDMILP0_MEM_PWR_STATE__SHIFT 8752 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DCO_MEM_PWR_STATUS1__HDMILP0_MEM_PWR_STATE__SHIFT                                                     0xa