DCO_MEM_PWR_STATUS1__DPLPA_MEM_PWR_STATE_MASK 15628 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DCO_MEM_PWR_STATUS1__DPLPA_MEM_PWR_STATE_MASK 0x1
DCO_MEM_PWR_STATUS1__DPLPA_MEM_PWR_STATE_MASK 16310 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCO_MEM_PWR_STATUS1__DPLPA_MEM_PWR_STATE_MASK 0x1
DCO_MEM_PWR_STATUS1__DPLPA_MEM_PWR_STATE_MASK 8754 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DCO_MEM_PWR_STATUS1__DPLPA_MEM_PWR_STATE_MASK                                                         0x00000001L