DCO_MEM_POWER_STATE__MVP_MEM_PWR_STATE__SHIFT 5062 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define DCO_MEM_POWER_STATE__MVP_MEM_PWR_STATE__SHIFT 0x00000004
DCO_MEM_POWER_STATE__MVP_MEM_PWR_STATE__SHIFT 2904 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define DCO_MEM_POWER_STATE__MVP_MEM_PWR_STATE__SHIFT 0x4