DCO_MEM_POWER_STATE__DPC_MEM_PWR_STATE_MASK 5039 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define DCO_MEM_POWER_STATE__DPC_MEM_PWR_STATE_MASK 0x00000c00L
DCO_MEM_POWER_STATE__DPC_MEM_PWR_STATE_MASK 2909 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define DCO_MEM_POWER_STATE__DPC_MEM_PWR_STATE_MASK 0xc00