DCI_MEM_PWR_STATUS__FBC_MEM_PWR_STATE_MASK 2361 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DCI_MEM_PWR_STATUS__FBC_MEM_PWR_STATE_MASK 0x3000
DCI_MEM_PWR_STATUS__FBC_MEM_PWR_STATE_MASK 2309 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DCI_MEM_PWR_STATUS__FBC_MEM_PWR_STATE_MASK 0x3000
DCI_MEM_PWR_STATUS__FBC_MEM_PWR_STATE_MASK 2507 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCI_MEM_PWR_STATUS__FBC_MEM_PWR_STATE_MASK 0x3000
DCI_MEM_PWR_STATUS__FBC_MEM_PWR_STATE_MASK 3748 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DCI_MEM_PWR_STATUS__FBC_MEM_PWR_STATE_MASK                                                            0x00003000L