DCI_MEM_PWR_STATUS3__MCIF_DWB_LUMA_MEM0_PWR_STATE_MASK 2551 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCI_MEM_PWR_STATUS3__MCIF_DWB_LUMA_MEM0_PWR_STATE_MASK 0x3
DCI_MEM_PWR_STATUS3__MCIF_DWB_LUMA_MEM0_PWR_STATE_MASK 4240 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DCI_MEM_PWR_STATUS3__MCIF_DWB_LUMA_MEM0_PWR_STATE_MASK                                                0x00000003L