DCI_MEM_PWR_STATUS2__DMIF3_DATA_MEM_PWR_STATE__SHIFT 2394 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DCI_MEM_PWR_STATUS2__DMIF3_DATA_MEM_PWR_STATE__SHIFT 0xc
DCI_MEM_PWR_STATUS2__DMIF3_DATA_MEM_PWR_STATE__SHIFT 2342 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DCI_MEM_PWR_STATUS2__DMIF3_DATA_MEM_PWR_STATE__SHIFT 0xc
DCI_MEM_PWR_STATUS2__DMIF3_DATA_MEM_PWR_STATE__SHIFT 2536 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCI_MEM_PWR_STATUS2__DMIF3_DATA_MEM_PWR_STATE__SHIFT 0xc
DCI_MEM_PWR_STATUS2__DMIF3_DATA_MEM_PWR_STATE__SHIFT 3763 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DCI_MEM_PWR_STATUS2__DMIF3_DATA_MEM_PWR_STATE__SHIFT                                                  0xc