DCI_MEM_PWR_STATE__DMIF_XLR_MEM_PWR_STATE_MASK 4649 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define DCI_MEM_PWR_STATE__DMIF_XLR_MEM_PWR_STATE_MASK 0x03000000L
DCI_MEM_PWR_STATE__DMIF_XLR_MEM_PWR_STATE_MASK 2523 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define DCI_MEM_PWR_STATE__DMIF_XLR_MEM_PWR_STATE_MASK 0x3000000