DCI_MEM_PWR_STATE__DMIF1_MEM_PWR_STATE_MASK 4637 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define DCI_MEM_PWR_STATE__DMIF1_MEM_PWR_STATE_MASK 0x00000030L
DCI_MEM_PWR_STATE__DMIF1_MEM_PWR_STATE_MASK 2503 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define DCI_MEM_PWR_STATE__DMIF1_MEM_PWR_STATE_MASK 0x30