DCI_MEM_PWR_STATE2__DMCU_ERAM1_PWR_STATE_MASK 4623 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define DCI_MEM_PWR_STATE2__DMCU_ERAM1_PWR_STATE_MASK 0x00000003L
DCI_MEM_PWR_STATE2__DMCU_ERAM1_PWR_STATE_MASK 2531 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define DCI_MEM_PWR_STATE2__DMCU_ERAM1_PWR_STATE_MASK 0x3