DCI_MEM_PWR_CNTL__VIP_MEM_PWR_DIS_MASK 2499 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DCI_MEM_PWR_CNTL__VIP_MEM_PWR_DIS_MASK 0x40000000
DCI_MEM_PWR_CNTL__VIP_MEM_PWR_DIS_MASK 2459 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DCI_MEM_PWR_CNTL__VIP_MEM_PWR_DIS_MASK 0x40000000
DCI_MEM_PWR_CNTL__VIP_MEM_PWR_DIS_MASK 2681 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCI_MEM_PWR_CNTL__VIP_MEM_PWR_DIS_MASK 0x40000000
DCI_MEM_PWR_CNTL__VIP_MEM_PWR_DIS_MASK 3892 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DCI_MEM_PWR_CNTL__VIP_MEM_PWR_DIS_MASK                                                                0x40000000L