DCI_MEM_PWR_CNTL__MCIF_CWB1_MEM_PWR_FORCE_MASK 2493 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DCI_MEM_PWR_CNTL__MCIF_CWB1_MEM_PWR_FORCE_MASK 0xc000000
DCI_MEM_PWR_CNTL__MCIF_CWB1_MEM_PWR_FORCE_MASK 2453 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DCI_MEM_PWR_CNTL__MCIF_CWB1_MEM_PWR_FORCE_MASK 0xc000000
DCI_MEM_PWR_CNTL__MCIF_CWB1_MEM_PWR_FORCE_MASK 2675 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCI_MEM_PWR_CNTL__MCIF_CWB1_MEM_PWR_FORCE_MASK 0xc000000
DCI_MEM_PWR_CNTL__MCIF_CWB1_MEM_PWR_FORCE_MASK 3889 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DCI_MEM_PWR_CNTL__MCIF_CWB1_MEM_PWR_FORCE_MASK                                                        0x0C000000L