DCI_MEM_PWR_CNTL3__DMIF5_CHUNK_MEM_PWR_FORCE__SHIFT 2570 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DCI_MEM_PWR_CNTL3__DMIF5_CHUNK_MEM_PWR_FORCE__SHIFT 0xe
DCI_MEM_PWR_CNTL3__DMIF5_CHUNK_MEM_PWR_FORCE__SHIFT 2530 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DCI_MEM_PWR_CNTL3__DMIF5_CHUNK_MEM_PWR_FORCE__SHIFT 0xe
DCI_MEM_PWR_CNTL3__DMIF5_CHUNK_MEM_PWR_FORCE__SHIFT 2752 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCI_MEM_PWR_CNTL3__DMIF5_CHUNK_MEM_PWR_FORCE__SHIFT 0xe
DCI_MEM_PWR_CNTL3__DMIF5_CHUNK_MEM_PWR_FORCE__SHIFT 3953 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DCI_MEM_PWR_CNTL3__DMIF5_CHUNK_MEM_PWR_FORCE__SHIFT                                                   0xe