DCIO_HSYNCA_OUTPUT_SEL_PPLL2  124 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h 	DCIO_HSYNCA_OUTPUT_SEL_PPLL2                     = 0x2,
DCIO_HSYNCA_OUTPUT_SEL_PPLL2  893 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h 	DCIO_HSYNCA_OUTPUT_SEL_PPLL2                     = 0x2,
DCIO_HSYNCA_OUTPUT_SEL_PPLL2 1292 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h 	DCIO_HSYNCA_OUTPUT_SEL_PPLL2                     = 0x2,
DCIO_HSYNCA_OUTPUT_SEL_PPLL2 8113 drivers/gpu/drm/amd/include/navi10_enum.h DCIO_HSYNCA_OUTPUT_SEL_PPLL2             = 0x00000002,
DCIO_HSYNCA_OUTPUT_SEL_PPLL2 11645 drivers/gpu/drm/amd/include/vega10_enum.h DCIO_HSYNCA_OUTPUT_SEL_PPLL2             = 0x00000002,