DCIO_GSL_VSYNC_SEL_PIPE4  301 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h 	DCIO_GSL_VSYNC_SEL_PIPE4                         = 0x4,
DCIO_GSL_VSYNC_SEL_PIPE4 1070 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h 	DCIO_GSL_VSYNC_SEL_PIPE4                         = 0x4,
DCIO_GSL_VSYNC_SEL_PIPE4 1469 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h 	DCIO_GSL_VSYNC_SEL_PIPE4                         = 0x4,
DCIO_GSL_VSYNC_SEL_PIPE4 12007 drivers/gpu/drm/amd/include/vega10_enum.h DCIO_GSL_VSYNC_SEL_PIPE4                 = 0x00000004,