DCIO_GSL_VSYNC_SEL_PIPE1  298 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h 	DCIO_GSL_VSYNC_SEL_PIPE1                         = 0x1,
DCIO_GSL_VSYNC_SEL_PIPE1 1067 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h 	DCIO_GSL_VSYNC_SEL_PIPE1                         = 0x1,
DCIO_GSL_VSYNC_SEL_PIPE1 1466 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h 	DCIO_GSL_VSYNC_SEL_PIPE1                         = 0x1,
DCIO_GSL_VSYNC_SEL_PIPE1 12004 drivers/gpu/drm/amd/include/vega10_enum.h DCIO_GSL_VSYNC_SEL_PIPE1                 = 0x00000001,