DCIO_GENLK_CLK_OUTPUT_SEL_PPLL1  129 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h 	DCIO_GENLK_CLK_OUTPUT_SEL_PPLL1                  = 0x1,
DCIO_GENLK_CLK_OUTPUT_SEL_PPLL1  898 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h 	DCIO_GENLK_CLK_OUTPUT_SEL_PPLL1                  = 0x1,
DCIO_GENLK_CLK_OUTPUT_SEL_PPLL1 1297 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h 	DCIO_GENLK_CLK_OUTPUT_SEL_PPLL1                  = 0x1,
DCIO_GENLK_CLK_OUTPUT_SEL_PPLL1 8123 drivers/gpu/drm/amd/include/navi10_enum.h DCIO_GENLK_CLK_OUTPUT_SEL_PPLL1          = 0x00000001,
DCIO_GENLK_CLK_OUTPUT_SEL_PPLL1 11655 drivers/gpu/drm/amd/include/vega10_enum.h DCIO_GENLK_CLK_OUTPUT_SEL_PPLL1          = 0x00000001,