DCIO_CLOCK_CNTL__DISPCLK_R_DCIO_GATE_DIS__SHIFT 3270 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DCIO_CLOCK_CNTL__DISPCLK_R_DCIO_GATE_DIS__SHIFT 0x5
DCIO_CLOCK_CNTL__DISPCLK_R_DCIO_GATE_DIS__SHIFT 3342 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DCIO_CLOCK_CNTL__DISPCLK_R_DCIO_GATE_DIS__SHIFT 0x5
DCIO_CLOCK_CNTL__DISPCLK_R_DCIO_GATE_DIS__SHIFT 3592 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCIO_CLOCK_CNTL__DISPCLK_R_DCIO_GATE_DIS__SHIFT 0x5
DCIO_CLOCK_CNTL__DISPCLK_R_DCIO_GATE_DIS__SHIFT 9434 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DCIO_CLOCK_CNTL__DISPCLK_R_DCIO_GATE_DIS__SHIFT                                                       0x5
DCIO_CLOCK_CNTL__DISPCLK_R_DCIO_GATE_DIS__SHIFT 40106 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DCIO_CLOCK_CNTL__DISPCLK_R_DCIO_GATE_DIS__SHIFT                                                       0x5
DCIO_CLOCK_CNTL__DISPCLK_R_DCIO_GATE_DIS__SHIFT 48842 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DCIO_CLOCK_CNTL__DISPCLK_R_DCIO_GATE_DIS__SHIFT                                                       0x5
DCIO_CLOCK_CNTL__DISPCLK_R_DCIO_GATE_DIS__SHIFT 43340 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DCIO_CLOCK_CNTL__DISPCLK_R_DCIO_GATE_DIS__SHIFT                                                       0x5