DCIOCHIP_MASK_2BIT  533 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h typedef enum DCIOCHIP_MASK_2BIT {
DCIOCHIP_MASK_2BIT  536 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h } DCIOCHIP_MASK_2BIT;
DCIOCHIP_MASK_2BIT 1282 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h typedef enum DCIOCHIP_MASK_2BIT {
DCIOCHIP_MASK_2BIT 1285 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h } DCIOCHIP_MASK_2BIT;
DCIOCHIP_MASK_2BIT 1715 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h typedef enum DCIOCHIP_MASK_2BIT {
DCIOCHIP_MASK_2BIT 1718 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h } DCIOCHIP_MASK_2BIT;
DCIOCHIP_MASK_2BIT 8707 drivers/gpu/drm/amd/include/navi10_enum.h typedef enum DCIOCHIP_MASK_2BIT {
DCIOCHIP_MASK_2BIT 8710 drivers/gpu/drm/amd/include/navi10_enum.h } DCIOCHIP_MASK_2BIT;
DCIOCHIP_MASK_2BIT 9962 drivers/gpu/drm/amd/include/vega10_enum.h typedef enum DCIOCHIP_MASK_2BIT {
DCIOCHIP_MASK_2BIT 9965 drivers/gpu/drm/amd/include/vega10_enum.h } DCIOCHIP_MASK_2BIT;