DCIOCHIP_ENABLE_5BIT  529 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h typedef enum DCIOCHIP_ENABLE_5BIT {
DCIOCHIP_ENABLE_5BIT  532 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h } DCIOCHIP_ENABLE_5BIT;
DCIOCHIP_ENABLE_5BIT 1278 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h typedef enum DCIOCHIP_ENABLE_5BIT {
DCIOCHIP_ENABLE_5BIT 1281 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h } DCIOCHIP_ENABLE_5BIT;
DCIOCHIP_ENABLE_5BIT 1711 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h typedef enum DCIOCHIP_ENABLE_5BIT {
DCIOCHIP_ENABLE_5BIT 1714 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h } DCIOCHIP_ENABLE_5BIT;
DCIOCHIP_ENABLE_5BIT 8698 drivers/gpu/drm/amd/include/navi10_enum.h typedef enum DCIOCHIP_ENABLE_5BIT {
DCIOCHIP_ENABLE_5BIT 8701 drivers/gpu/drm/amd/include/navi10_enum.h } DCIOCHIP_ENABLE_5BIT;
DCIOCHIP_ENABLE_5BIT 9953 drivers/gpu/drm/amd/include/vega10_enum.h typedef enum DCIOCHIP_ENABLE_5BIT {
DCIOCHIP_ENABLE_5BIT 9956 drivers/gpu/drm/amd/include/vega10_enum.h } DCIOCHIP_ENABLE_5BIT;