DCIOCHIP_ENABLE_2BIT  537 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h typedef enum DCIOCHIP_ENABLE_2BIT {
DCIOCHIP_ENABLE_2BIT  540 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_enum.h } DCIOCHIP_ENABLE_2BIT;
DCIOCHIP_ENABLE_2BIT 1286 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h typedef enum DCIOCHIP_ENABLE_2BIT {
DCIOCHIP_ENABLE_2BIT 1289 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h } DCIOCHIP_ENABLE_2BIT;
DCIOCHIP_ENABLE_2BIT 1719 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h typedef enum DCIOCHIP_ENABLE_2BIT {
DCIOCHIP_ENABLE_2BIT 1722 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h } DCIOCHIP_ENABLE_2BIT;
DCIOCHIP_ENABLE_2BIT 8716 drivers/gpu/drm/amd/include/navi10_enum.h typedef enum DCIOCHIP_ENABLE_2BIT {
DCIOCHIP_ENABLE_2BIT 8719 drivers/gpu/drm/amd/include/navi10_enum.h } DCIOCHIP_ENABLE_2BIT;
DCIOCHIP_ENABLE_2BIT 9971 drivers/gpu/drm/amd/include/vega10_enum.h typedef enum DCIOCHIP_ENABLE_2BIT {
DCIOCHIP_ENABLE_2BIT 9974 drivers/gpu/drm/amd/include/vega10_enum.h } DCIOCHIP_ENABLE_2BIT;