DCFE_MEM_PWR_STATUS__LB1_MEM_PWR_STATE__SHIFT  506 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DCFE_MEM_PWR_STATUS__LB1_MEM_PWR_STATE__SHIFT 0x12
DCFE_MEM_PWR_STATUS__LB1_MEM_PWR_STATE__SHIFT 14815 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DCFE_MEM_PWR_STATUS__LB1_MEM_PWR_STATE__SHIFT 0x12
DCFE_MEM_PWR_STATUS__LB1_MEM_PWR_STATE__SHIFT 15449 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCFE_MEM_PWR_STATUS__LB1_MEM_PWR_STATE__SHIFT 0x12