DCFE_MEM_PWR_CTRL__SCL_COEFF_MEM_PWR_FORCE_MASK  427 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DCFE_MEM_PWR_CTRL__SCL_COEFF_MEM_PWR_FORCE_MASK 0xc0
DCFE_MEM_PWR_CTRL__SCL_COEFF_MEM_PWR_FORCE_MASK 14740 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DCFE_MEM_PWR_CTRL__SCL_COEFF_MEM_PWR_FORCE_MASK 0xc0
DCFE_MEM_PWR_CTRL__SCL_COEFF_MEM_PWR_FORCE_MASK 15374 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCFE_MEM_PWR_CTRL__SCL_COEFF_MEM_PWR_FORCE_MASK 0xc0