DCFE_MEM_PWR_CTRL__SCL_COEFF_MEM_PWR_DIS_MASK  429 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DCFE_MEM_PWR_CTRL__SCL_COEFF_MEM_PWR_DIS_MASK 0x100
DCFE_MEM_PWR_CTRL__SCL_COEFF_MEM_PWR_DIS_MASK 14742 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DCFE_MEM_PWR_CTRL__SCL_COEFF_MEM_PWR_DIS_MASK 0x100
DCFE_MEM_PWR_CTRL__SCL_COEFF_MEM_PWR_DIS_MASK 15376 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCFE_MEM_PWR_CTRL__SCL_COEFF_MEM_PWR_DIS_MASK 0x100