DCCG_GATE_DISABLE_CNTL__AOMCLK1_GATE_DISABLE__SHIFT 1546 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define DCCG_GATE_DISABLE_CNTL__AOMCLK1_GATE_DISABLE__SHIFT 0x12
DCCG_GATE_DISABLE_CNTL__AOMCLK1_GATE_DISABLE__SHIFT 1452 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define DCCG_GATE_DISABLE_CNTL__AOMCLK1_GATE_DISABLE__SHIFT 0x12
DCCG_GATE_DISABLE_CNTL__AOMCLK1_GATE_DISABLE__SHIFT 1580 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define DCCG_GATE_DISABLE_CNTL__AOMCLK1_GATE_DISABLE__SHIFT 0x12
DCCG_GATE_DISABLE_CNTL__AOMCLK1_GATE_DISABLE__SHIFT 2669 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define DCCG_GATE_DISABLE_CNTL__AOMCLK1_GATE_DISABLE__SHIFT                                                   0x12
DCCG_GATE_DISABLE_CNTL__AOMCLK1_GATE_DISABLE__SHIFT 1526 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define DCCG_GATE_DISABLE_CNTL__AOMCLK1_GATE_DISABLE__SHIFT 0x12
DCCG_GATE_DISABLE_CNTL__AOMCLK1_GATE_DISABLE__SHIFT 2033 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define DCCG_GATE_DISABLE_CNTL__AOMCLK1_GATE_DISABLE__SHIFT                                                   0x12
DCCG_GATE_DISABLE_CNTL__AOMCLK1_GATE_DISABLE__SHIFT  610 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define DCCG_GATE_DISABLE_CNTL__AOMCLK1_GATE_DISABLE__SHIFT                                                   0x12
DCCG_GATE_DISABLE_CNTL__AOMCLK1_GATE_DISABLE__SHIFT  492 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define DCCG_GATE_DISABLE_CNTL__AOMCLK1_GATE_DISABLE__SHIFT                                                   0x12