DB_COUNT_CONTROL__SAMPLE_RATE__SHIFT 21633 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define DB_COUNT_CONTROL__SAMPLE_RATE__SHIFT                                                                  0x4
DB_COUNT_CONTROL__SAMPLE_RATE__SHIFT 14341 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define DB_COUNT_CONTROL__SAMPLE_RATE__SHIFT                                                                  0x4
DB_COUNT_CONTROL__SAMPLE_RATE__SHIFT 15670 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define DB_COUNT_CONTROL__SAMPLE_RATE__SHIFT                                                                  0x4
DB_COUNT_CONTROL__SAMPLE_RATE__SHIFT 15532 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define DB_COUNT_CONTROL__SAMPLE_RATE__SHIFT                                                                  0x4
DB_COUNT_CONTROL__SAMPLE_RATE__SHIFT 3229 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define DB_COUNT_CONTROL__SAMPLE_RATE__SHIFT 0x00000004
DB_COUNT_CONTROL__SAMPLE_RATE__SHIFT 3538 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define DB_COUNT_CONTROL__SAMPLE_RATE__SHIFT 0x4
DB_COUNT_CONTROL__SAMPLE_RATE__SHIFT 4262 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define DB_COUNT_CONTROL__SAMPLE_RATE__SHIFT 0x4
DB_COUNT_CONTROL__SAMPLE_RATE__SHIFT 4784 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define DB_COUNT_CONTROL__SAMPLE_RATE__SHIFT 0x4