CRTC_V_TOTAL_CONTROL_CRTC_V_TOTAL_MIN_SEL_FALSE   62 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h 	CRTC_V_TOTAL_CONTROL_CRTC_V_TOTAL_MIN_SEL_FALSE  = 0x0,
CRTC_V_TOTAL_CONTROL_CRTC_V_TOTAL_MIN_SEL_FALSE   62 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h 	CRTC_V_TOTAL_CONTROL_CRTC_V_TOTAL_MIN_SEL_FALSE  = 0x0,
CRTC_V_TOTAL_CONTROL_CRTC_V_TOTAL_MIN_SEL_FALSE 1888 drivers/gpu/drm/amd/include/vega10_enum.h CRTC_V_TOTAL_CONTROL_CRTC_V_TOTAL_MIN_SEL_FALSE  = 0x00000000,