CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT  750 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT 0x0
CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT  712 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT 0x0
CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT  752 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT 0x0
CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT 2290 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT 0x00000000
CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT  684 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define CRTC_STATUS_HV_COUNT__CRTC_HV_COUNT__SHIFT 0x0