CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT  682 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT 0xd
CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT  644 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT 0xd
CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT  684 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT 0xd
CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT 2068 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT 0x0000000d
CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT  620 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define CRTC_CONTROL__CRTC_FIELD_NUMBER_CNTL__SHIFT 0xd