CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT  686 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT 0x10
CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT  648 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT 0x10
CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT  688 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT 0x10
CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT 2062 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT 0x00000010
CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT  624 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE__SHIFT 0x10