CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK  685 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK 0x10000
CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK  647 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK 0x10000
CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK  687 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK 0x10000
CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK 2061 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK 0x00010000L
CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK  623 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define CRTC_CONTROL__CRTC_CURRENT_MASTER_EN_STATE_MASK 0x10000