CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT 6551 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT                                                                    0xa
CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT 1071 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT                                                                    0xa
CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT  970 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT                                                                    0xa
CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT  937 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT                                                                    0xa
CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT 3091 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT 0x0000000a
CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT 2972 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT 0xa
CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT 3586 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT 0xa
CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT 4108 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_STAT__ROQ_INDIRECT1_BUSY__SHIFT 0xa