CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT 6767 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT                                                            0x10
CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT 1287 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT                                                            0x10
CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT 1186 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT                                                            0x10
CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT 1153 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT                                                            0x10
CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT 2893 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT 0x00000010
CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT 3180 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT 0x10
CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT 3794 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT 0x10
CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT 4316 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_ROQ_IB1_STAT__ROQ_WPTR_INDIRECT1__SHIFT 0x10