CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT 6735 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT                                                                     0x0
CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT 1257 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT                                                                     0x0
CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT 1156 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT                                                                     0x0
CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT 1123 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT                                                                     0x0
CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT 2889 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT 0x00000000
CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT 3156 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT 0x0
CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT 3770 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT 0x0
CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT 4292 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_ROQ_AVAIL__ROQ_CNT_RING__SHIFT 0x0