CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 6737 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK                                                                       0x00000FFFL
CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 1259 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK                                                                       0x000007FFL
CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 1158 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK                                                                       0x000007FFL
CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 1125 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK                                                                       0x000007FFL
CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 2888 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 0x000007ffL
CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 3155 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 0x7ff
CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 3769 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 0x7ff
CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 4291 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 0x7ff