CP_PQ_WPTR_POLL_CNTL1__QUEUE_MASK__SHIFT 18231 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_PQ_WPTR_POLL_CNTL1__QUEUE_MASK__SHIFT                                                              0x0
CP_PQ_WPTR_POLL_CNTL1__QUEUE_MASK__SHIFT 11244 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_PQ_WPTR_POLL_CNTL1__QUEUE_MASK__SHIFT                                                              0x0
CP_PQ_WPTR_POLL_CNTL1__QUEUE_MASK__SHIFT 12746 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_PQ_WPTR_POLL_CNTL1__QUEUE_MASK__SHIFT                                                              0x0
CP_PQ_WPTR_POLL_CNTL1__QUEUE_MASK__SHIFT 12531 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_PQ_WPTR_POLL_CNTL1__QUEUE_MASK__SHIFT                                                              0x0
CP_PQ_WPTR_POLL_CNTL1__QUEUE_MASK__SHIFT 1488 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_PQ_WPTR_POLL_CNTL1__QUEUE_MASK__SHIFT 0x0
CP_PQ_WPTR_POLL_CNTL1__QUEUE_MASK__SHIFT 1918 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_PQ_WPTR_POLL_CNTL1__QUEUE_MASK__SHIFT 0x0
CP_PQ_WPTR_POLL_CNTL1__QUEUE_MASK__SHIFT 2440 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_PQ_WPTR_POLL_CNTL1__QUEUE_MASK__SHIFT 0x0