CP_PQ_STATUS__DOORBELL_UPDATED__SHIFT 18857 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_PQ_STATUS__DOORBELL_UPDATED__SHIFT                                                                 0x0
CP_PQ_STATUS__DOORBELL_UPDATED__SHIFT 11909 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_PQ_STATUS__DOORBELL_UPDATED__SHIFT                                                                 0x0
CP_PQ_STATUS__DOORBELL_UPDATED__SHIFT 13361 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_PQ_STATUS__DOORBELL_UPDATED__SHIFT                                                                 0x0
CP_PQ_STATUS__DOORBELL_UPDATED__SHIFT 13139 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_PQ_STATUS__DOORBELL_UPDATED__SHIFT                                                                 0x0
CP_PQ_STATUS__DOORBELL_UPDATED__SHIFT 1978 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_PQ_STATUS__DOORBELL_UPDATED__SHIFT 0x0
CP_PQ_STATUS__DOORBELL_UPDATED__SHIFT 2494 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_PQ_STATUS__DOORBELL_UPDATED__SHIFT 0x0
CP_PQ_STATUS__DOORBELL_UPDATED__SHIFT 3016 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_PQ_STATUS__DOORBELL_UPDATED__SHIFT 0x0