CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK 26969 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK                                                             0xFFFFFFFFL
CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK 19185 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK                                                             0xFFFFFFFFL
CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK 20518 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK                                                             0xFFFFFFFFL
CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK 20445 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK                                                             0xFFFFFFFFL
CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK 2662 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK 0xffffffffL
CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK 2455 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK 0xffffffff
CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK 2999 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK 0xffffffff
CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK 3521 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_PA_CPRIM_COUNT_HI__CPRIM_COUNT_HI_MASK 0xffffffff