CP_MEM_SLP_CNTL__RESERVED__SHIFT 18171 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_MEM_SLP_CNTL__RESERVED__SHIFT                                                                      0x2
CP_MEM_SLP_CNTL__RESERVED__SHIFT 11186 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_MEM_SLP_CNTL__RESERVED__SHIFT                                                                      0x2
CP_MEM_SLP_CNTL__RESERVED__SHIFT 12689 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_MEM_SLP_CNTL__RESERVED__SHIFT                                                                      0x2
CP_MEM_SLP_CNTL__RESERVED__SHIFT 12487 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_MEM_SLP_CNTL__RESERVED__SHIFT                                                                      0x2
CP_MEM_SLP_CNTL__RESERVED__SHIFT 2607 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define CP_MEM_SLP_CNTL__RESERVED__SHIFT 0x00000002
CP_MEM_SLP_CNTL__RESERVED__SHIFT 1440 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_MEM_SLP_CNTL__RESERVED__SHIFT 0x2
CP_MEM_SLP_CNTL__RESERVED__SHIFT 1884 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_MEM_SLP_CNTL__RESERVED__SHIFT 0x2
CP_MEM_SLP_CNTL__RESERVED__SHIFT 2406 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_MEM_SLP_CNTL__RESERVED__SHIFT 0x2