CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT 18111 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT                                                       0x1a
CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT 11135 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT                                                       0x1a
CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT 12638 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT                                                       0x1a
CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT 12442 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT                                                       0x1a
CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT 2551 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT 0x0000001a
CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT 1330 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT 0x1a
CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT 1694 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT 0x1a
CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT 2218 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_INT_STATUS_RING2__TIME_STAMP_INT_STAT__SHIFT 0x1a