CP_INT_STATUS_RING2__GFX_IDLE_INT_STAT_MASK 18124 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CP_INT_STATUS_RING2__GFX_IDLE_INT_STAT_MASK                                                           0x00200000L
CP_INT_STATUS_RING2__GFX_IDLE_INT_STAT_MASK 11147 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CP_INT_STATUS_RING2__GFX_IDLE_INT_STAT_MASK                                                           0x00200000L
CP_INT_STATUS_RING2__GFX_IDLE_INT_STAT_MASK 12650 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CP_INT_STATUS_RING2__GFX_IDLE_INT_STAT_MASK                                                           0x00200000L
CP_INT_STATUS_RING2__GFX_IDLE_INT_STAT_MASK 12454 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CP_INT_STATUS_RING2__GFX_IDLE_INT_STAT_MASK                                                           0x00200000L
CP_INT_STATUS_RING2__GFX_IDLE_INT_STAT_MASK 1685 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CP_INT_STATUS_RING2__GFX_IDLE_INT_STAT_MASK 0x200000
CP_INT_STATUS_RING2__GFX_IDLE_INT_STAT_MASK 2209 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CP_INT_STATUS_RING2__GFX_IDLE_INT_STAT_MASK 0x200000